| A low power scheduling scheme with resources operating at multiple voltages A Manzak, C Chakrabarti IEEE Transactions on Very Large Scale Integration (VLSI) Systems 10 (1), 6-14, 2002 | 113 | 2002 |
| Variable voltage task scheduling algorithms for minimizing energy A Manzak, C Chakrabarti Proceedings of the 2001 international symposium on low power electronics and …, 2001 | 81 | 2001 |
| Variable voltage task scheduling for minimizing energy or minimizing power A Manzak, C Chakrabarti 2000 IEEE International Conference on Acoustics, Speech, and Signal …, 2000 | 73 | 2000 |
| Variable voltage task scheduling algorithms for minimizing energy/power A Manzak, C Chakrabarti IEEE Transactions on Very Large Scale Integration (VLSI) Systems 11 (2), 270-276, 2003 | 72 | 2003 |
| Automated Classification of Alzheimer’s Disease using Deep Neural Network (DNN) by Random Forest Feature Elimination D Manzak, G Cetinel, A Manzak The 14th International Conference on Computer Science and Education (ICCSE …, 2019 | 17 | 2019 |
| An ultra-low power CMOS PTAT current source C Christoffersen, G Toombs, A Manzak 2010 Argentine School of Micro-Nanoelectronics, Technology and Applications …, 2010 | 17 | 2010 |
| Power-Aware L1 and L2 Caches for GPGPUs E Atoofian, A Manzak Euro-Par 2014 Parallel Processing: 20th International Conference, Porto …, 2014 | 6 | 2014 |
| Voltage scaling for energy minimization with QoS constraints A Manzak, C Chakrabarti Proceedings 2001 IEEE International Conference on Computer Design: VLSI in …, 2001 | 4 | 2001 |
| Analysis of environmental, economic, and demographic factors affecting Covid-19 transmission and associated deaths in the USA D Manzak, A Manzak Economic, and Demographic Factors Affecting COVID-19 Transmission and …, 2020 | 3 | 2020 |
| Design and analysis of low power Carbon Nanotube Field Effect Transistor (CNFET) D Flip-Flops (DFFs) Ö Polat, A Manzak 2011 3rd International Conference on Computer Research and Development 3 …, 2011 | 3 | 2011 |
| Application of Very Fast Simulated Reannealing (VFSR) to low power design A Manzak, H Goksu Embedded Computer Systems: Architectures, Modeling, and Simulation: 5th …, 2005 | 2 | 2005 |
| Optimum buffer size for dynamic voltage processors A Manzak, C Chakrabarti Lecture notes in computer science, 711-721, 2004 | 2 | 2004 |
| Improving power of cache and register file through critical path instructions KL Chen, E Atoofian, A Manzak 2014 17th Euromicro Conference on Digital System Design, 349-355, 2014 | 1 | 2014 |
| Evaluation of Low Power Carbon Nanotube Field Effect Transistor (CNFET) Master-Slave Latches Ö Polat, A Manzak Proc. 2012 ICICA, IPCSIT 32, 1543-1551, 2008 | 1 | 2008 |
| Bulanık mantık ile latch optimizasyonu K Başaran SDÜ Fen Bilimleri Enstitüsü, 2006 | 1 | 2006 |
| Temperature aware datapath scheduling A Manzak Integrated Circuit and System Design. Power and Timing Modeling …, 2005 | 1 | 2005 |
| What Retention Rate Is Expected For Your Institution? D Manzak, A Manzak 2022 IEEE 13th Annual Ubiquitous Computing, Electronics & Mobile …, 2022 | | 2022 |
| Low Power Design for DVFS Capable Software A Manzak, SE Seker The 10th IEEE Annual Ubiquitous Computing, Electronics & Mobile …, 2019 | | 2019 |
| Reducing Power of Memory Hierarchy in General Purpose Graphics Processing Units A Saghir, E Atoofian, A Manzak Journal of Low Power Electronics 13 (2), 149-165, 2017 | | 2017 |
| İşlemsel zekanın elektromanyetik problemlere uygulanması H Göksu Fen Bilimleri Enstitüsü, Süleyman Demirel Üniversitesi, 2006 | | 2006 |
Chaitali ChakrabartiProfessor of Electrical Engineering, SECEE, Arizona State UniversityVerified email at asu.edu
