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Matthew M. Ziegler
Matthew M. Ziegler
IBM T.J. Watson Research Center
在 us.ibm.com 的电子邮件经过验证 - 首页
标题
引用次数
引用次数
年份
Molecular electronics: From devices and interconnect to circuits and architecture
MR Stan, PD Franzon, SC Goldstein, JC Lach, MM Ziegler
Proceedings of the IEEE 91 (11), 1940-1957, 2003
3682003
CMOS/nano co-design for crossbar-based molecular electronic systems
MM Ziegler, MR Stan
IEEE Transactions on Nanotechnology 2 (4), 217-230, 2003
2402003
A sub-600-mV, fluctuation tolerant 65-nm CMOS SRAM array with dynamic cell biasing
AJ Bhavnagarwala, S Kosonocky, C Radens, Y Chan, K Stawiasz, ...
IEEE Journal of Solid-State Circuits 43 (4), 946-955, 2008
1392008
A Scalable Multi-TeraOPS Deep Learning Processor Core for AI Trainina and Inference
B Fleischer, S Shukla, M Ziegler, J Silberman, J Oh, V Srinivasan, J Choi, ...
2018 IEEE Symposium on VLSI Circuits, 35-36, 2018
1202018
Design and analysis of crossbar circuits for molecular nanoelectronics
MM Ziegler, MR Stan
Proceedings of the 2nd IEEE Conference on Nanotechnology, 323-327, 2002
1202002
5.1 POWER8TM: A 12-core server-class processor in 22nm SOI with 7.6Tb/s off-chip bandwidth
EJ Fluhr, J Friedrich, D Dreps, V Zyuban, G Still, C Gonzalez, A Hall, ...
2014 IEEE International Solid-State Circuits Conference Digest of Technical …, 2014
1162014
Relative ordering circuit synthesis
M Cho, R Puri, H Ren, X Tang, H Xiang, MM Ziegler
US Patent 8,756,541, 2014
832014
Relative ordering circuit synthesis
M Cho, R Puri, H Ren, X Tang, H Xiang, MM Ziegler
US Patent 8,756,541, 2014
832014
Specifying circuit level connectivity during circuit design synthesis
MD Amundson, D Kucar, R Puri, CN Sze, MM Ziegler
US Patent 8,839,162, 2014
592014
Specifying circuit level connectivity during circuit design synthesis
MD Amundson, D Kucar, R Puri, CN Sze, MM Ziegler
US Patent 8,839,162, 2014
592014
Converged large block and structured synthesis for high performance microprocessor designs
M Cho, VN Kravets, S Krishnaswamy, D Kucar, J Narasimhan, R Puri, ...
US Patent 8,271,920, 2012
492012
Converged large block and structured synthesis for high performance microprocessor designs
M Cho, VN Kravets, S Krishnaswamy, D Kucar, J Narasimhan, R Puri, ...
US Patent 8,271,920, 2012
492012
A case for CMOS/nano co-design
MM Ziegler, MR Stan
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided …, 2002
482002
A case for CMOS/nano co-design
MM Ziegler, MR Stan
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided …, 2002
482002
9.1 a 7nm 4-core AI chip with 25.6 TFLOPS hybrid FP8 training, 102.4 TOPS INT4 inference and workload-aware throttling
A Agrawal, SK Lee, J Silberman, M Ziegler, M Kang, S Venkataramani, ...
2021 IEEE International Solid-State Circuits Conference (ISSCC) 64, 144-146, 2021
442021
4.1 22nm Next-generation IBM System z microprocessor
J Warnock, B Curran, J Badar, G Fredeman, DW Plass, Y Chan, S Carey, ...
IEEE International Solid-State Circuits Conference, 2015
432015
4.1 22nm next-generation ibm system z microprocessor
J Warnock, B Curran, J Badar, G Fredeman, D Plass, Y Chan, S Carey, ...
2015 IEEE International Solid-State Circuits Conference-(ISSCC) Digest of …, 2015
432015
The CMOS/nano interface from a circuits perspective
MM Ziegler, MR Stan
Proceedings of the 2003 International Symposium on Circuits and Systems …, 2003
412003
A synthesis-parameter tuning system for autonomous design-space exploration
MM Ziegler, HY Liu, G Gristede, B Owens, R Nigaglioni, LP Carloni
2016 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2016
402016
Scalability simulations for nanomemory systems integrated on the molecular scale
MM Ziegler, CA Picconatto, JC Ellenbogen, A Dehon, D Wang, Z Zhong, ...
Annals of the New York Academy of Sciences 1006 (1), 312-330, 2003
382003
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