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Xiankun "Robert" Jin
Xiankun "Robert" Jin
NXP Semiconductors
Verified email at utexas.edu
Title
Cited by
Cited by
Year
USER-SMILE: Ultrafast stimulus error removal and segmented model identification of linearity errors for ADC built-in self-test
T Chen, X Jin, RL Geiger, D Chen
IEEE Transactions on Circuits and Systems I: Regular Papers 65 (7), 2059-2069, 2017
382017
Ramp voltage generator and method for testing an analog-to-digital converter
X Jin, DA Garrity
US Patent 9,319,033, 2016
142016
An on-chip ADC BIST solution and the BIST enabled calibration scheme
X Jin, T Chen, M Jain, AK Barman, D Kramer, D Garrity, R Geiger, D Chen
2017 IEEE International Test Conference (ITC), 1-10, 2017
122017
Low-cost high-quality constant offset injection for SEIR-based ADC built-in-self-test
X Jin, N Sun
2014 IEEE International Symposium on Circuits and Systems (ISCAS), 285-288, 2014
102014
Dynamic comparator
T Chen, X Jin, JP Schat
US Patent 10,505,519, 2019
62019
Low cost high accuracy stimulus generator for on-chip spectral testing
K Bhatheja, S Chaganti, D Chen, XR Jin, CC Dao, J Ren, A Kumar, ...
2022 IEEE International Test Conference (ITC), 514-518, 2022
52022
Fast Gate Leakage Current Monitor With Large Dynamic Range
K Bhatheja, X Jin, M Strong, D Chen
IEEE Transactions on Circuits and Systems II: Express Briefs 68 (5), 1690-1694, 2021
52021
Method for testing analog-to-digital converter and system therefor
T Chen, X Jin
US Patent 9,473,164, 2016
32016
Method for testing differential analog-to-digital converter and system therefor
T Chen, DA Garrity, X Jin
US Patent 9,438,262, 2016
32016
Apparatuses involving calibration of input offset voltage and signal delay of circuits and methods thereof
T Chen, X Jin, JP Schat
US Patent 11,585,849, 2023
22023
Self-test apparatuses having distributed self-test controller circuits and controller circuitry to control self-test execution based on self-test properties and method thereof
X Jin, JP Schat, T Chen, L Ma
US Patent 10,816,595, 2020
22020
Analog-to-digital converter (ADC) testing
X Jin, DA Garrity, M Lehmann, K Abhishek
US Patent 11,489,535, 2022
12022
Unsupervised Learning-based Early Anomaly Detection in AMS Circuits of Automotive SoCs
A Arunachalam, A Kizhakkayil, S Kundu, A Raha, S Banerjee, R Jin, F Su, ...
2022 IEEE International Test Conference (ITC), 229-238, 2022
12022
Bootstrapped switch
K Bhatheja, CC Dao, X Jin
US Patent 11,418,188, 2022
12022
Analog-test-bus apparatuses involving calibration of comparator circuits and methods thereof
JP Schat, X Jin, T Chen
US Patent 10,866,277, 2020
12020
Testing of on-chip analog-mixed signal circuits using on-chip memory
K Abhishek, X Jin, M Lehmann
US Patent 11,961,577, 2024
2024
Matching Critical Analog Circuit Components up to 3rd Order Gradients for All Possible Exact Matching Ratios
M Sekyere, I Bruce, R Yang, D Chen, CC Mcandrew, X Jin, C He, ...
Authorea Preprints, 2024
2024
Layered architecture for managing health of an electronic system and methods for layered health management
X Jin, AB Gonzalez, M Blazy-Winning
US Patent App. 18/348,403, 2024
2024
Compensated alternating polarity capacitive structures
RS Jones III, X Jin
US Patent 11,728,336, 2023
2023
Innovation Practices Track: Silicon Lifecycle Management Challenges and Opportunities
F Su, XR Jin, N Mukherjee, Y Zorian
2023 IEEE 41st VLSI Test Symposium (VTS), 1-1, 2023
2023
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