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Haitong Li
Haitong Li
Assistant Professor of ECE, Purdue University
在 purdue.edu 的电子邮件经过验证 - 首页
标题
引用次数
引用次数
年份
Recommended methods to study resistive switching devices
M Lanza, HSP Wong, E Pop, D Ielmini, D Strukov, BC Regan, L Larcher, ...
Advanced Electronic Materials 5 (1), 1800143, 2019
5822019
Electronic synapses made of layered two-dimensional materials
Y Shi, X Liang, B Yuan, V Chen, H Li, F Hui, Z Yu, F Yuan, E Pop, ...
Nature Electronics 1 (8), 458-465, 2018
5532018
A physics-based compact model of metal-oxide-based RRAM DC and AC operations
P Huang, XY Liu, B Chen, H Li, YJ Wang, YX Deng, KL Wei, L Zeng, ...
IEEE Transactions on Electron Devices 60 (12), 4090-4097, 2013
2112013
Brain-inspired computing exploiting carbon nanotube FETs and resistive RAM: Hyperdimensional computing case study
TF Wu, H Li, PC Huang, A Rahimi, JM Rabaey, HSP Wong, MM Shulaker, ...
2018 IEEE International Solid-State Circuits Conference-(ISSCC), 492-494, 2018
1432018
Hyperdimensional computing with 3D VRRAM in-memory kernels: Device-architecture co-design for energy-efficient, error-resilient language recognition
H Li, TF Wu, A Rahimi, KS Li, M Rusch, CH Lin, JL Hsu, MM Sabry, ...
2016 IEEE International Electron Devices Meeting (IEDM), 16.1. 1-16.1. 4, 2016
1422016
Device and materials requirements for neuromorphic computing
R Islam, H Li, PY Chen, W Wan, HY Chen, B Gao, H Wu, S Yu, ...
Journal of Physics D: Applied Physics 52 (11), 113001, 2019
1412019
A SPICE model of resistive random access memory for large-scale memory array simulation
H Li, P Huang, B Gao, B Chen, X Liu, J Kang
IEEE Electron Device Letters 35 (2), 211-213, 2014
1412014
Ternary content-addressable memory with MoS 2 transistors for massively parallel data search
R Yang, H Li, KKH Smithe, TR Kim, K Okabe, E Pop, JA Fan, HSP Wong
Nature Electronics 2 (3), 108-114, 2019
1012019
Variation-aware, reliability-emphasized design and optimization of RRAM using SPICE model
H Li, Z Jiang, P Huang, Y Wu, HY Chen, B Gao, X Liu, J Kang, HSP Wong
Design, Automation & Test in Europe (DATE), 1425, 2015
1012015
A learnable parallel processing architecture towards unity of memory and computing
H Li, B Gao, Z Chen, Y Zhao, P Huang, H Ye, L Liu, X Liu, J Kang
Scientific Reports 5 (13330), 2015
912015
Four-layer 3D vertical RRAM integrated with FinFET as a versatile computing unit for brain-inspired cognitive information processing
H Li, KS Li, CH Lin, JL Hsu, WC Chiu, MC Chen, TT Wu, J Sohn, ...
2016 IEEE Symposium on VLSI Technology, 2016
792016
Hyperdimensional Computing Exploiting Carbon Nanotube FETs, Resistive RAM, and Their Monolithic 3D Integration
TF Wu, H Li, PC Huang, A Rahimi, G Hills, B Hodson, W Hwang, ...
IEEE Journal of Solid-State Circuits 53 (11), 3183-3196, 2018
762018
TIMELY: Pushing Data Movements and Interfaces in PIM Accelerators Towards Local and in Time Domain
W Li, P Xu, Y Zhao, H Li, Y Xie, Y Lin
IEEE/ACM International Symposium on Computer Architecture (ISCA), 2020
742020
Resistive RAM-Centric Computing: Design and Modeling Methodology
H Li, TF Wu, S Mitra, HSP Wong
IEEE Transactions on Circuits and Systems I: Regular Papers 64 (9), 2263-2273, 2017
742017
Optimized learning scheme for grayscale image recognition in a RRAM based analog neuromorphic system
Z Chen, B Gao, Z Zhou, P Huang, H Li, W Ma, D Zhu, L Liu, X Liu, J Kang, ...
IEEE International Electron Devices Meeting (IEDM), 17.7.1 - 17.7.4, 2015
592015
On-Chip Memory Technology Design Space Explorations for Mobile Deep Neural Network Accelerators
H Li, M Bhargava, PN Whatmough, HSP Wong
Proceedings of the 56th Annual Design Automation Conference 2019, 131, 2019
582019
Stanford Memory Trends
HSP Wong, C Ahn, J Cao, HY Chen, SB Eryilmaz, SW Fong, JA Incorvia, ...
Tech. Report, 2017
582017
SAPIENS: A 64-kb RRAM-Based Non-Volatile Associative Memory for One-Shot Learning and Inference at the Edge
H Li, WC Chen, A Levy, CH Wang, H Wang, PH Chen, W Wan, WS Khwa, ...
IEEE Transactions on Electron Devices, 2021
462021
A 43pJ/Cycle Non-Volatile Microcontroller with 4.7 μs Shutdown/Wake-up Integrating 2.3-bit/Cell Resistive RAM and Resilience Techniques
TF Wu, BQ Le, R Radway, A Bartolo, W Hwang, S Jeong, H Li, P Tandon, ...
2019 IEEE International Solid-State Circuits Conference-(ISSCC), 226-228, 2019
382019
Modeling and Optimization of Bilayered TaOₓ RRAM Based on Defect Evolution and Phase Transition Effects
Y Zhao, P Huang, Z Chen, C Liu, H Li, B Chen, W Ma, F Zhang, B Gao, ...
IEEE Transactions on Electron Devices 63 (4), 1524 - 1532, 2016
372016
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