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Bentian Jiang
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Detailed routing by sparse grid graph and minimum-area-captured path search
G Chen, CW Pui, H Li, J Chen, B Jiang, EFY Young
Proceedings of the 24th Asia and South Pacific Design Automation Conference …, 2019
37*2019
Dr. CU 2.0: A scalable detailed routing framework with correct-by-construction design rule satisfaction
H Li, G Chen, B Jiang, J Chen, EFY Young
2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 1-7, 2019
272019
A fast machine learning-based mask printability predictor for OPC acceleration
B Jiang, H Zhang, J Yang, EFY Young
Proceedings of the 24th Asia and South Pacific Design Automation Conference …, 2019
152019
Neural-ILT: Migrating ILT to neural networks for mask printability and complexity co-optimization
B Jiang, L Liu, Y Ma, H Zhang, B Yu, EFY Young
2020 IEEE/ACM International Conference On Computer Aided Design (ICCAD), 1-9, 2020
102020
Fit: Fill insertion considering timing
B Jiang, X Zhang, R Chen, G Chen, P Tu, W Li, EFY Young, B Yu
Proceedings of the 56th Annual Design Automation Conference 2019, 1-6, 2019
82019
CU. POKer: placing DNNs on wafer-scale AI accelerator with optimal kernel sizing
B Jiang, J Chen, J Liu, L Liu, F Wang, X Zhang, EFY Young
Proceedings of the 39th International Conference on Computer-Aided Design, 1-9, 2020
62020
Building up End-to-end Mask Optimization Framework with Self-training
B Jiang, X Zhang, L Liu, EFY Young
Proceedings of the 2021 International Symposium on Physical Design, 63-70, 2021
12021
Machine-learning based prediction method for iterative clustering during clock tree synthesis
B Jiang, N Viswanathan, Z Li, YX Ding
US Patent 11,244,099, 2022
2022
Dynamic weighting scheme for local cluster refinement
B Jiang, N Viswanathan, WR Reece, Z Li
US Patent 11,188,702, 2021
2021
Neural-ILT 2.0: Migrating ILT to Domain-specific and Multi-task-enabled Neural Network
B Jiang, L Liu, Y Ma, B Yu, EFY Young
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2021
2021
CU. POKer: Placing DNNs on WSE With Optimal Kernel Sizing and Efficient Protocol Optimization
B Jiang, J Chen, J Liu, L Liu, F Wang, X Zhang, EFY Young
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2021
2021
Towards Automated End-to-End VLSI Design for Manufacturability Solutions
B Jiang
PQDT-Global, 2021
2021
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