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Mohit Kumar Gupta
Mohit Kumar Gupta
Senior Memory Designer @ Axelera AI
Verified email at axelera.ai - Homepage
Title
Cited by
Cited by
Year
Single-Ended Schmitt-Trigger-Based Robust Low-Power SRAM Cell
S Ahmad, MK Gupta, N Alam, M Hasan
IEEE, 2016
1622016
Novel forksheet device architecture as ultimate logic scaling device towards 2nm
P Weckx, J Ryckaert, ED Litta, D Yakimets, P Matagne, P Schuddinck, ...
IEDM, 2019
892019
Low Leakage Single Bitline 9 T (SB9T) Static Random Access Memory
S Ahmad, MK Gupta, N Alam, M Hasan
Microelectronics Journal 62, 1-11, 2017
662017
Voltage-gate-assisted spin-orbit-torque magnetic random-access memory for high-density and low-power embedded applications
YC Wu, K Garello, W Kim, M Gupta, M Perumkunnil, V Kateel, S Couet, ...
Physical Review Applied 15 (6), 064015, 2021
612021
High-density SOT-MRAM technology and design specifications for the embedded domain at 5nm node
M Gupta, M Perumkunnil, K Garello, S Rao, F Yasin, G Sankar Kar, ...
IEDM, 2020
362020
SRAM with Buried Power Distribution to Improve Write Margin and Performance in Advanced Technology Nodes
SM Salahuddin, KA Shaik, A Gupta, B Chava, M Gupta, P Weckx, ...
IEEE Electron Device Letters, 2019
342019
Robust High Speed Ternary Magnetic Content Addressable Memory
MK Gupta, M Hasan
IEEE, 2015
312015
A Comprehensive Study of Nanosheet and Forksheet SRAM for Beyond N5 Node
MK Gupta, P Weckx, P Schuddinck, D Jang, B Chehab, S Cosemans, ...
IEEE Transactions on Electron Devices, 2021
292021
High Density Magnetic Flash ADC using Domain Wall Motion and Pre-Charge Sense Amplifiers
Y Upadhyaya, M Gupta, M Hasan, S Maheshwari
IEEE, 2016
232016
System and method for tunable precision of dot-product engine
M Gupta, W Dehaene, S Sakhare, P Weckx
US Patent App. 16/222,767, 2019
162019
The Complementary FET (CFET) 6T-SRAM
MK Gupta, P Weckx, P Schuddinck, D Jang, B Chehab, S Cosemans, ...
IEEE Transactions on Electron Devices, 2021
132021
Cim-based robust logic accelerator using 28 nm stt-mram characterization chip tape-out
A Singh, M Zahedi, T Shahroodi, M Gupta, A Gebregiorgis, M Komalan, ...
2022 IEEE 4th International Conference on Artificial Intelligence Circuits …, 2022
122022
Selective operations of multi-pillar SOT-MRAM for high density and low power embedded memories
K Cai, SV Beek, S Rao, K Fan, M Gupta, V Nguyen, G Jayakumar, ...
VLSI, 2022
122022
A Low-Power Robust Easily Cascaded PentaMTJ-Based Combinational and Sequential Circuits
MK Gupta, M Hasan
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 24 (1), 218-222, 2015
112015
Design of high speed energy efficient masking error immune PentaMTJ based TCAM
MK Gupta, M Hasan
IEEE, 2015
112015
First demonstration of field-free perpendicular SOTMRAM for ultrafast and high-density embedded memories
K Cai, G Talmelli, K Fan, SV Beek, V Kateel, M Gupta, MG Monteiro, ...
IEDM, 2022
102022
Device circuit and technology co-optimisation for FinFET based 6T SRAM cells beyond N7
MK Gupta, P Weckx, S Cosemans, P Schuddinck, R Baert, D Yakimets, ...
2017 47th European Solid-State Device Research Conference (ESSDERC), 256-259, 2017
92017
Self-Terminated Write Assist Technique for STT-RAM
MK Gupta, M Hasan
IEEE, 2016
92016
Field-free spin–orbit torque driven switching of perpendicular magnetic tunnel junction through bending current
V Kateel, V Krizakova, S Rao, K Cai, M Gupta, MG Monteiro, F Yasin, ...
Nano Letters 23 (12), 5482-5489, 2023
72023
Microarchitectural Exploration of STT-MRAM Last-level Cache Parameters for Energy-efficient Devices
T MARINELLI, JIG PÉREZ, C TENLLADO, M KOMALAN, M GUPTA, ...
ACM Transactions on Embedded Computing Systems 21, 2022
42022
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