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Mario Patetta
Mario Patetta
Ph.D. Candidate in Electrical Engineering, Conservatoire National des Arts et Métiers
Verified email at cnam.fr
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Year
Approximated computing for low power neural networks
GC Cardarilli, L Di Nunzio, R Fazzolari, D Giardino, M Matta, M Patetta, ...
Telkomnika (Telecommunication Computing Electronics and Control) 17 (3 …, 2019
132019
A lightweight southbound interface for standalone P4-NetFPGA SmartNICs
M Patetta, S Secci, S Taktak
2022 1st International Conference on 6G Networking (6GNet), 1-4, 2022
32022
Line-Rate Botnet Detection with Smartnic-Embedded Feature Extraction
M Patetta, S Secci, S Taktak
Available at SSRN 4717964, 0
A motor controller for TORVEbot based on a System On Chip
AE Casucci, M El Arayshi, K Issa, L Canese, P Lucantonio, M Patetta
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Articles 1–4